Belkin 2.0 RELEASE NOTES Manual do Utilizador descarregar pdf (Página 15)

Application Loading Enhancements

In this release the Launch Configuration dialog has been enhanced to allow users to

load multiple dxes at the same time with the option to merge symbols, perform resets or

load symbols only on each application listed. This is useful for developing applications

that are spread across multiple dxe files (say one for a ROM image and another for the

standard application).

Add-in Wizard Enhancements

The overall look and feel of the Add-in page in the System Configuration Editor and the

New Project Wizard has been enhanced to provide better usability as well as more

helpful diagnostics when add-in conflicts are detected.

Linker Support for External Memory

The CCES 1.0.1 linker has support for external memory for the SHARC processors

ADSP-2136[7-9], ADSP-2137[1,5], ADSP-2146[7,9], ADSP-2147[7-9], ADSP-2148[3,6-

9] as follows:

(1) Synchronous external memory (e.g., DDR2) and asynchronous external memory

(e.g., flash) are distinguished by specification of the keywords SYNCHRONOUS and

ASYNCHRONOUS in the TYPE specification of the LDF MEMORY statement. If neither

is specified for an external memory region the linker assumes the region is

SYNCHRONOUS. Note that all default LDFs supplied with CCES 1.0.1 have been

modified to specify these keywords.

(2) The linker xml files in $CCESDir\System\ArchDef defining the valid external memory

ranges allow specification of the synchronicity (attributes synchronous and

asynchronous) and memory bank (attribute bank). Here $CCESDir denotes the CCES

1.0.1 installation directory. e.g., C:\Analog Devices\CrossCore Embedded Studio 1.0.1

(3) The linker performs logical to physical address translation before comparing external

memory regions in the LDF for overlap; omission of this translation could cause

overlaps to be missed or non-overlapping regions to be reported as overlapping.

The linker translates the logical address specified in the LDF to the external memory

physical address as follows:

External Memory Data

All accesses to external memory data must use normal word (i.e., 32 bit) addressing.

The mapping of logical address (L) to physical address P in a bank beginning at logical

address B and for memory width w is:

f = 32/w ;

P = (bank == 0) ? f * L : B + ( L - B) * f ;

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