Belkin XM Commander Especificações descarregar pdf (Página 65)

REF: BB_SRM_xM BeagleBoard-xM System

Reference Manual

Revision A2

Page 65 of 164

o QNX

o Symbian

o Others

This processor device includes state-of-the-art power-management techniques required

for high-performance low power products. The DM3730 supports the following functions

and interfaces on the BeagleBoard:

o Microprocessor unit (MPU) subsystem based on the ARM Cortex-A8™

microprocessor

o POP Memory interface

o 4Gb MDDR (512Mbytes)

o 24 Bit RGB Display interface (DSS)

o SD/MMC interface

o USB OTG interface

o NTSC/PAL/S-Video output

o Power management

o Serial interface

o I

C interface

o I

S Audio interface (McBSP2)

o Expansion McBSP1

o JTAG debugging interface

8.10.2 SDRAM Bus

The SDRAM bus is not accessible on the BeagleBoard. Its connectivity is limited to the

POP memory access on the top of the processor and therefore is only accessible by the

SDRAM memory. The base address for the DDR SDRAM in the POP device is 0x8000

0000.

If you look at the –xM schematic, you will notice on page 3 there are a lot of signals

labeled NA0…65. These pins are located on the bottom of the processor. In the Rev C4

processor, these pins provided access to the SDRAM bus. However, in the case of the

processor on the –xM, these there are no signals on these pins.

8.10.3 GPMC Bus

The GPMC bus is not accessible on the BeagleBoard. Its connectivity is limited to the

POP memory access on the top of the processor and therefore is only accessible by the

NAND memory.

The memory on the GPMC bus is NAND and therefore will support the classical NAND

interface. The address of the memory space is programmable.

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Belkin XM Commander Especificações Página 65